DocumentCode :
342183
Title :
A VLSI chip for wavelet image compression
Author :
Schwarzenberg, M. ; Traber, M. ; Scholles, M. ; Schuffny, R.
Author_Institution :
Fraunhofer-Inst. of Microelectron. Circuits & Syst., Dresden, Germany
Volume :
4
fYear :
1999
fDate :
36342
Firstpage :
271
Abstract :
We have designed a VLSI chip for wavelet image compression which is especially suited for CCD area sensors as well as for new technology approaches in CMOS image sensors. The design has been developed for maximal resolutions of 3072 times 2048 pixels. The used compression algorithm gives a PSNR (peak signal to noise ratio) of up to 39 dB at 1 bit/pixel for common test images
Keywords :
CMOS digital integrated circuits; VLSI; data compression; digital signal processing chips; image coding; image processing equipment; quantisation (signal); transform coding; wavelet transforms; 2048 pixel; 3072 pixel; CCD area sensors; CMOS image sensors; PSNR; VHDL model; VLSI chip design; binary adaptive quantizer; binary iterated value quantizer; coding algorithm; compression algorithm; high coding speed; maximal resolution; parallel multiplier/adder pipelines; quantization; wavelet image compression; CMOS image sensors; CMOS technology; Charge coupled devices; Charge-coupled image sensors; Compression algorithms; Image coding; PSNR; Pixel; Signal resolution; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
Type :
conf
DOI :
10.1109/ISCAS.1999.779994
Filename :
779994
Link To Document :
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