Title :
A variable-precision systolic architecture for ANN computation
Author :
Bermak, Amine ; Martinez, Dominique
Author_Institution :
Lab. d´´Anal. et d´´Archit. des Syst., CNRS, Toulouse, France
Abstract :
When Artificial Neural Networks (ANNs) are implemented in VLSI with fixed precision arithmetic, the accumulation of numerical errors may lead to results which are completely inaccurate. To avoid this, we propose a variable-precision arithmetic in which the precision of the computation is specified by the user at each layer in the network. This paper presents a top-down approach for designing an efficient bit-level systolic architecture for variable precision neural computation
Keywords :
VLSI; digital arithmetic; multilayer perceptrons; neural chips; systolic arrays; ANN computation; VLSI; bit-level systolic architecture; neural computation; numerical errors; top-down approach; variable-precision systolic architecture; Arithmetic; Artificial neural networks; Computer architecture; Computer networks; Equations; Hardware; Neural networks; Neurons; Roundoff errors; Very large scale integration;
Conference_Titel :
Microelectronics for Neural Networks, 1996., Proceedings of Fifth International Conference on
Conference_Location :
Lausanne
Print_ISBN :
0-8186-7373-7
DOI :
10.1109/MNNFS.1996.493814
