A fully on-chip LDO regulator with a novel PSRR boosting circuit

Author

Quan Zhou ; Shuxu Guo ; Qiang Li ; Zhaohan Li ; Jingyi Song ; Yuchun Chang

Author_Institution

State Key Lab. on Integrated Optoelectron., Jilin Univ., Changchun, China

fYear

2012

fDate

Oct. 29 2012-Nov. 1 2012

Firstpage

1

Lastpage

3

Abstract

A novel PSRR boosting circuit is presented to improve mid-frequency power supply rejection ratio (PSRR) of fully on-chip low dropout regulator (LDO). With this method, the zeros of PSRR are rearranged in a nested Miller compensation (NMC) based fully on-chip LDO. The mid-frequency PSRR is boosted when the dominant zero of PSRR is moved to higher frequency by the PSRR boosting circuit. Fabricated with GSMC 0.18μm CMOS process, the LDO features a -63dB PSRR at 100 kHz and about -40dB at 1MHz.

Keywords

CMOS integrated circuits; voltage regulators; GSMC CMOS process; NMC based fully on-chip LDO; PSRR boosting circuit; frequency 1 MHz; frequency 100 kHz; fully on-chip LDO regulator; fully on-chip low dropout regulator; mid-frequency PSRR; mid-frequency power supply rejection ratio; nested Miller compensation based fully on-chip LDO; size 0.18 mum; Boosting; Capacitors; Equations; Radio frequency; Regulators; Semiconductor device measurement; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4673-2474-8

Type

conf

DOI

10.1109/ICSICT.2012.6467934

Filename

6467934