4 Mbps infrared wireless link dedicated to mobile computing

A high performance and low power architecture is devised for a 4 Mbps infrared wireless communication system dedicated to the mobile computing. In this architecture, 4PPM (4-pulse position modulation) infrared signals detected by an infrared receiver are digitized into TTL interface level pulses, and the digitized pulses are demodulated by a 1-bit digital demodulator. To improve the dynamic range of the link length, a 4PPM demodulator is synthesized to implement a demodulation algorithm which is constructed so as to accommodate the output tolerance of the infrared receiver. A part of experimental results shows that the realized 4 Mbps infrared communication system can achieve an error free link in the range of 0-140 cm at 90 mW power consumption. The communication controller is integrated in a 0.6 μm CMOS standard-cell chip, which contains 10,015 transistors on a 12 mm² die