Title :
Package induced low-k delaminations: Numerical developments and experimental investigations to address FEBE compatibility fracture phenomena.
Author :
Gallois-Garreignot, Sebastien ; Fiori, Vincent ; Nelias, D.
Author_Institution :
STMicroelectronics, Crolles
Abstract :
The development of Cu/low-k interconnects to meet continuous tighter specifications (lower RC time delay, power consumption...) and consequently the introduction of mechanically weak materials is widely identified as a contributor of interfacial cracks propagating during manufacturing flow or qualification tests. Moreover, a raise in Front-End/Back-End (FE/BE) compatibility issues has been also observed and tends to narrow process windows from both Front-End to packaging steps. In this paper, related to FEBE compatibility problematic, as a complement to an experimental analysis, a numerical study is proposed. More precisely, a dedicated failure analysis (FA) on large dies molded on a ball grid array (BGA) package submitted to thermo cycling has been performed. Based on a wide range of failed samples, reproducible trends are drawn on the delamination characteristics. Further to these conclusions, mechanical modeling is used to forecast the failure mechanism and to go deeper in the phenomena understanding. Question is still opened about the most relevant numerical tool to employ in order to address and solve such mechanical related yield loss contributor. In that frame, the so-called nodal release energy (NRE) method, an in-house developed failure criterion, has previously shown its easiness to be applied in industrial applications. Thus, this latter criterion is applied to reproduce and to correlate the crack features experimentally observed. This correlation would allow further device improvements, including the low-k interconnect structure designs. Future work axes concerning the most relevant method development are finally described.
Keywords :
ball grid arrays; cracks; failure (mechanical); fracture; thermal expansion; ball grid array package; failure analysis; front-end/back-end compatibility fracture; interfacial cracks; low-k interconnect structure designs; mechanical modeling; nodal release energy; thermo cycling; Delamination; Delay effects; Electronics packaging; Energy consumption; Failure analysis; Iron; Manufacturing; Materials testing; Predictive models; Qualifications;
Conference_Titel :
Thermal, Mechanical and Multi-Physics simulation and Experiments in Microelectronics and Microsystems, 2009. EuroSimE 2009. 10th International Conference on
Conference_Location :
Delft
Print_ISBN :
978-1-4244-4160-0
Electronic_ISBN :
978-1-4244-4161-7
DOI :
10.1109/ESIME.2009.4938430