Title :
Corner-rounded shallow trench isolation technology to reduce the stress-induced tunnel oxide leakage current for highly reliable flash memories
Author :
Watanabe, H. ; Shimizu, K. ; Takeuchi, Y. ; Aritome, S.
Author_Institution :
Microelectron. Eng. Lab., Toshiba Corp., Yokohama, Japan
Abstract :
This paper describes the key technology to realize highly reliable flash memory cells, which have submicron Shallow Trench Isolation (STI). It has been clarified for the first time that the Stress-Induced Leakage Current (SILC) of the tunnel oxide on the rounded corners of the STI edges is about one order smaller than SILC of the flat oxide. Moreover, data retention characteristics of the flash memory cells with the rounded corners are drastically improved due to the reduction of SILC. Therefore, corner-rounded STI technology will surely become necessary for highly reliable quarter-micron flash memories and beyond.
Keywords :
EPROM; integrated circuit reliability; integrated memory circuits; isolation technology; leakage currents; tunnelling; corner-rounded shallow trench isolation technology; data retention; flash memory; reliability; stress-induced leakage current; tunnel oxide; Capacitors; Current density; Current measurement; Flash memory; Flash memory cells; Isolation technology; Laboratories; Leakage current; Microelectronics; Reliability engineering;
Conference_Titel :
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3393-4
DOI :
10.1109/IEDM.1996.554109