• DocumentCode
    3423900
  • Title

    Electrically driven matter transport effects in PoP interconnections

  • Author

    Feng, W. ; Weide-Zaage, K. ; Verdier, F. ; Plano, B. ; Guédon-Gracia, A. ; Frémont, H.

  • Author_Institution
    Lab. IMS, Univ. Bordeaux I, Talence
  • fYear
    2009
  • fDate
    26-29 April 2009
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    The migration issue of PackPackage-on-Packageage-on-package (PoP) is investigated in this article. The migration phenomenon can be amplified as the density of solder bumps increases, while the paths are very finer as well in PoP. These migration effects were first evaluated by three dimensional finite element simulations in ANSYS in a previous article, in which the bottom of the bump was found out to be the weakest part of the structure in the electrical, thermal and stress fields driven by current loads in the PoP assemblies. To verify this conclusion, the experiments were performed in the assembly cards for analyzing migration effects in PoP. "Top", "bottom" and PoP components were assembled on test cards. Daisy chained bumps were chosen to investigate the migration phenomenon by comparing the behaviors between the single package ("top" and "bottom") and PoP. The test assembly cards were placed into a temperature-controlled chamber with one ampere current stressing the components. This experiment was performed at different temperatures. In conclusion, the migration problem of PoP was studied by experiments, and new simulations were also carried out. The IMCs were analyzed for understanding the migration phenomenon. The comparison of the simulation and experimental results indicates high electromigration mass flux divergences at the position of the open circuit.
  • Keywords
    assembling; electromigration; finite element analysis; integrated circuit interconnections; ANSYS; PoP interconnections; assembly cards; electrically driven matter transport effects; electromigration mass flux; migration effects; package-on-package; solder bumps; temperature-controlled chamber; three dimensional finite element simulations; Assembly; Circuit simulation; Finite element methods; Integrated circuit interconnections; Packaging; Performance analysis; Temperature; Testing; Thermal loading; Thermal stresses;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Thermal, Mechanical and Multi-Physics simulation and Experiments in Microelectronics and Microsystems, 2009. EuroSimE 2009. 10th International Conference on
  • Conference_Location
    Delft
  • Print_ISBN
    978-1-4244-4160-0
  • Electronic_ISBN
    978-1-4244-4161-7
  • Type

    conf

  • DOI
    10.1109/ESIME.2009.4938457
  • Filename
    4938457