Title :
The design and implementation of Signal Integrity test vector generation based on JTAG
Author :
Xuelong, Yan ; Hu Hejuan ; Haihui, Li
Author_Institution :
Sch. of Electron. Eng., GUET, Guilin, China
Abstract :
With intensive study on IEEE std1149.1, and the basic idea of HTF(Half Transition) Fault Mode, an architecture for SI(Signal Integrity) test vector based on extended JTAG is designed and realized. The implementation of the idea is that, The advantage of the new instruction is that on the base of fully complied with IEEE1149.1 standard, it have been added to extend the function of boundary-scan architecture and provide the support to SI testing.
Keywords :
IEEE standards; automatic test pattern generation; boundary scan testing; fault simulation; IEEE std1149.1; IEEE1149.1 standard; boundary-scan architecture; extended JTAG; half transition fault mode; signal integrity test vector generation; Computer crashes; BSC; HTF; IEEE1149.1; PGBSC; SI;
Conference_Titel :
Intelligent Computing and Integrated Systems (ICISS), 2010 International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-6834-8
DOI :
10.1109/ICISS.2010.5656962
