Title :
A 3 V switched-current pipelined analog-to-digital converter in a 5 V CMOS process
Author :
Jonsson, Bengt E. ; Tenhunen, Hannu
Author_Institution :
Ericsson Radio Syst. AB, Stockholm, Sweden
Abstract :
An experimental A/D converter design is presented. Fully differential first-generation switched-current circuits with common-mode feed-forward were used to implement a 1.5-b/stage pipelined architecture. With a 1.83 MHz input current sampled at 3 MHz, the measured SFDR and SNDR is 60.3 and 46.5 dB respectively. Measurement results are compared with previously reported wide-band switched-current A/D converters. It is seen that, in this work, a very large input bandwidth and a low distortion is demonstrated
Keywords :
CMOS integrated circuits; analogue-digital conversion; feedforward; pipeline processing; switched current circuits; 1.83 MHz; 3 V; CMOS process; SFDR; SNDR; common-mode feed-forward; fully differential first-generation switched-current circuits; input bandwidth; input current; switched-current pipelined analog-to-digital converter; Analog-digital conversion; Bandwidth; CMOS process; CMOS technology; Distortion measurement; Integrated circuit technology; Linearity; Microelectronics; Sampling methods; Wideband;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.780731
