• DocumentCode
    342466
  • Title

    Class AB technique for high performance switched-current memory cells

  • Author

    Worapishet, Apisak ; Hughes, John B. ; Toumazou, Chris

  • Author_Institution
    Mahanakorn Univ. of Technol., Bangkok, Thailand
  • Volume
    2
  • fYear
    1999
  • fDate
    36342
  • Firstpage
    456
  • Abstract
    A new class AB zero-voltage switched-current memory cell is presented. The circuit is theoretically shown to provide a significant improvement over the conventional class A zero-voltage cell in terms of a figure-of-merit combining speed, signal-to-noise-ratio and power dissipation. It also exhibits a constant settling characteristic and signal-independent charge injection errors, even in single-ended structures, resulting in an inherently highly linear memory cell. The theoretical advantage of this cell is confirmed by simulation which demonstrates a six-fold improvement in the figure-of-merit
  • Keywords
    analogue storage; cellular arrays; switched current circuits; circuit speed; class AB technique; figure-of-merit; linear memory cell; power dissipation; settling characteristic; signal-independent charge injection errors; signal-to-noise-ratio; switched-current memory cells; Circuit noise; Circuit simulation; Educational institutions; Laboratories; Linearity; MOS devices; Power dissipation; Signal to noise ratio; Switching circuits; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
  • Conference_Location
    Orlando, FL
  • Print_ISBN
    0-7803-5471-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1999.780767
  • Filename
    780767