Title :
Hybrid EMODL Ling addition
Author :
Grad, Johannes ; Stine, James E.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA
Abstract :
Carry-lookahead adders have traditionally demonstrated that they are among the fastest adders available. By computing carry signals in parallel as much as possible the propagation delay of this type of adder is significantly reduced as opposed to carry propagation adders. Further algorithmic advancements have been proposed by Ling to use pseudo-carries, which are even faster to compute. For CMOS dynamic logic the EMODL adder has demonstrated that a 32-bit adder can be constructed with only 3 stages of logic and an unprecedented small hardware complexity. This paper presents a novel hybrid adder. By introducing Ling´s algorithm into the EMODL adder, the critical path can be shortened with only a slight increase in hardware complexity.
Keywords :
CMOS logic circuits; adders; carry logic; CMOS dynamic logic; carry-lookahead adders; hardware complexity; hybrid EMODL Ling addition; parallel carry signals; propagation delay; pseudo-carries; Adders; CMOS logic circuits; Concurrent computing; Costs; Equations; Hardware; Logic design; Propagation delay; Signal generators; Switches;
Conference_Titel :
Signals, Systems and Computers, 2002. Conference Record of the Thirty-Sixth Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
Print_ISBN :
0-7803-7576-9
DOI :
10.1109/ACSSC.2002.1197052