A new metric for microelectronic package assessment: application to micro/chip scale packages

A new metric for comparing microelectronic packaging technical value is presented and applied to the new field of micro or chip scale packaging technology. A thorough, detailed technical benchmark study of chip scale packages has been performed. A key result from this study is the definition of a new technology metric for comparing electronics packaging approaches. The new metric incorporates quantitative measures of performance, manufacturability, complexity and efficiency in a simple graphic presentation of relative design value. This tool is then demonstrated through application to micropackages and their comparison with more traditional SMT and MCM technologies. The combined results of the benchmark study and the new metrics provide a clear basis for intelligent risk/benefit analysis in strategic packaging technology planning and selection. The results can be applied to both system and sub-system level designs to focus engineering effort on crucial development areas. Subsequent design of experiments can then be targeted early in the development process avoiding wasted engineering effort