DocumentCode :
3426796
Title :
Using Simulation to Validate Style-Specific Architectural Refactoring Patterns
Author :
Stephenson, Zoë ; McDermid, John ; Choy, Jason
Author_Institution :
Dept. of Comput. Sci., York Univ.
fYear :
2006
fDate :
38808
Firstpage :
123
Lastpage :
132
Abstract :
When developing a new domain-specific architectural style, there can be uncertainty about the feasibility of using that style. In particular, the HADES architectural style contains refactoring patterns intended to remove undesirable scheduling features such as deadlock and livelock, but these patterns have not yet been validated. We report on the development of a simulator environment to help validate these refactoring patterns and generally demonstrate HADES architectures to non-specialists. The simulator implements the synchronisation and coordination specified by the architecture to help visualise the behaviour of the otherwise static architectural descriptions. We found simulation to be a useful tool in both visualising complex interaction semantics and in validating refactoring patterns
Keywords :
formal specification; formal verification; object-oriented programming; software architecture; software maintenance; synchronisation; HADES architectural style; formal specification; formal verification; simulation; style-specific architectural refactoring pattern; synchronisation implementation; Computer architecture; Connectors; Control systems; Modeling; Output feedback; Packaging; Protocols; Scheduling; Software engineering; Systems engineering and theory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Software Engineering Workshop, 2006. SEW '06. 30th Annual IEEE/NASA
Conference_Location :
Columbia, MD
ISSN :
1550-6215
Print_ISBN :
0-7695-2624-1
Type :
conf
DOI :
10.1109/SEW.2006.40
Filename :
4090253
Link To Document :
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