Fully integrated power management unit (PMU) using NMOS Low Dropout regulators

A fully integrated power management unit for an ultra-low-cost SoC is presented. A multi-stage power management unit is introduced with different power domains controlled by 10 Low Dropout (LDO) regulators. LDOs are designed with NMOS pass-transistors only and without external capacitance output. A 2X charge-pump and a bandgap circuitry supply the reference voltages. The stability of LDO, line and load regulations are achieved using a second fast feedback loop which takes over control at high frequencies. A regulated cascode current-mirror architecture is proposed to filter the switching noise of the chargepump, to drive properly the gate of the pass NMOS and to achieve a PSR higher than -40dB over a wide frequency range. The fully on-chip LDO regulator is able to deliver 1.2V at a loading current of 20mA with a dropout of 100mV. The power management unit can provide 200mA and it consumes only 0.2% of the total battery current. The circuit is designed in a 90nm CMOS process from STMicroelectronics and needs 0.24mm² silicon area.