DocumentCode :
3429290
Title :
Enhancement-mode p-channel GaAs MOSFETs on semi-insulating substrates
Author :
Ren, F. ; Hong, M.W. ; Hobson, W.S. ; Kuo, J.M. ; Lothian, J.R. ; Mannaerts, J.P. ; Kwo, J. ; Chen, Y.K. ; Cho, A.Y.
Author_Institution :
Lucent Technol., AT&T Bell Labs., Murray Hill, NJ, USA
fYear :
1996
fDate :
8-11 Dec. 1996
Firstpage :
943
Lastpage :
945
Abstract :
We report on the first demonstration of an enhancement-mode p-channel GaAs metal oxide field effect transistor (MOSFET) realized directly on GaAs semi-insulating substrate with a fully ion-implant technology. The device, with a 40/spl times/50 /spl mu/m/sup 2/ gate geometry, shows very good DC characteristics with transconductance of 0.3 mS/mm and an excellent gate breakdown field greater then 3 MV/cm.
Keywords :
III-V semiconductors; MOSFET; gallium arsenide; ion implantation; DC characteristics; GaAs; enhancement-mode p-channel GaAs MOSFET; gate breakdown field; ion-implant technology; semi-insulating substrate; transconductance; Breakdown voltage; Dielectric substrates; Electrons; FETs; Gallium arsenide; Gold; MOSFETs; Surface reconstruction; Temperature; Transconductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location :
San Francisco, CA, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-3393-4
Type :
conf
DOI :
10.1109/IEDM.1996.554137
Filename :
554137
Link To Document :
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