• DocumentCode
    3429329
  • Title

    Monobit receiver

  • Author

    Tsui, J.B.Y. ; Schamus, J.J. ; Kaneshiro, D.H.

  • Author_Institution
    Wright Lab., Wright-Patterson AFB, OH, USA
  • Volume
    2
  • fYear
    1997
  • fDate
    8-13 June 1997
  • Firstpage
    469
  • Abstract
    This paper presents a very simple digital receiver design which can cover approximately 1 GHz bandwidth and process two simultaneous signals. The design has the potential to be fabricated on a single chip.
  • Keywords
    UHF integrated circuits; fast Fourier transforms; integrated circuit design; radio receivers; signal processing; signal processing equipment; 1 GHz; ADC; FFT operation; RF front end; digital receiver design; fast Fourier transform; frequency selection logic; monobit receiver; simultaneous signal processing; single chip fabrication; Adders; Band pass filters; Bandwidth; Discrete Fourier transforms; Dynamic range; Kernel; Radio frequency; Radiofrequency amplifiers; Signal design; Signal processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microwave Symposium Digest, 1997., IEEE MTT-S International
  • Conference_Location
    Denver, CO, USA
  • ISSN
    0149-645X
  • Print_ISBN
    0-7803-3814-6
  • Type

    conf

  • DOI
    10.1109/MWSYM.1997.602834
  • Filename
    602834
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3429329