Design and modeling of metal finger capacitors for RF applications

This paper presents the preliminary work on the design and modeling of metal finger capacitors for radio frequency (RF) applications. The capacitors are fabricated using Silterra´s industry standard 180 nm RF CMOS process technology. The capacitors are drawn using up to 5 metal layers. SPICE lumped-element circuit models of the capacitors are developed. This includes effects such as parasitic ground capacitance, series resistance, parasitic inductance, voltage dependence, temperature dependence, mismatch, and process variation. The model development process includes converting RF measurement information (S-parameters) into equivalent circuit models. Equivalent circuits are designed with ideal capacitors, inductors, and resistors interconnected to accurately represent the integrated RF component with all related properties.