Design and modeling of metal finger capacitors for RF applications

Author

Subramaniam, Kalavathi ; Kordesch, Albert Victor ; Esa, Mazlina

Author_Institution

Dept. of Radio Commun. Eng., UTM Skudai, Malaysia

fYear

2005

fDate

20-21 Dec. 2005

Abstract

This paper presents the preliminary work on the design and modeling of metal finger capacitors for radio frequency (RF) applications. The capacitors are fabricated using Silterra´s industry standard 180 nm RF CMOS process technology. The capacitors are drawn using up to 5 metal layers. SPICE lumped-element circuit models of the capacitors are developed. This includes effects such as parasitic ground capacitance, series resistance, parasitic inductance, voltage dependence, temperature dependence, mismatch, and process variation. The model development process includes converting RF measurement information (S-parameters) into equivalent circuit models. Equivalent circuits are designed with ideal capacitors, inductors, and resistors interconnected to accurately represent the integrated RF component with all related properties.

Keywords

CMOS integrated circuits; S-parameters; SPICE; capacitors; equivalent circuits; integrated circuit design; integrated circuit modelling; lumped parameter networks; radiofrequency integrated circuits; CMOS process technology; RF applications; S-parameters; SPICE lumped-element circuit models; equivalent circuit models; metal finger capacitors; parasitic ground capacitance; parasitic inductance; radio frequency applications; series resistance; temperature dependence; voltage dependence; CMOS process; CMOS technology; Capacitors; Equivalent circuits; Fingers; Parasitic capacitance; Radio frequency; SPICE; Semiconductor device modeling; Textile industry;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied Electromagnetics, 2005. APACE 2005. Asia-Pacific Conference on

Print_ISBN

0-7803-9431-3

Type

conf

DOI

10.1109/APACE.2005.1607828

Filename

1607828