• DocumentCode
    3429818
  • Title

    A Hardware-Accelerated Reduced Dimensionality Multi-Prototype Learning and Recognition System with complementary classifiers

  • Author

    Wicaksono, Indra Bagus ; Fengwei An ; Mattausch, Hans Jurgen

  • Author_Institution
    Res. Inst. for Nanodevice & Bio Syst., Hiroshima Univ., Hiroshima, Japan
  • fYear
    2013
  • fDate
    12-15 Nov. 2013
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Real-time performance is necessary for many computer vision and machine learning systems in the robotics and automotive domains. Hardware based solutions can meet the demands of real-time applications. Support Vector Machines have demonstrated to be one of the best performing general purpose classifiers, however the approach requires significant simplifications to satisfy hardware constraints. Conversely, associative memory based architectures are inherently hardware friendly and have proven to be a promising approach for high-speed computer vision and machine learning applications, but the accuracies of these systems have not been satisfactory. This paper extends the concept of hardware associative memories and reports an FPGA Accelerated Complementary Reduced Dimensionality Multi-Prototype Learning and Recognition System which is composed of discriminative Reduced Dimensionality Multi-Prototype classifiers. To test the performance, the system is applied to human detection. In addition to outperforming general purpose support vector machine based systems, the complementary approach demonstrated a combined detection time of only 14.9 μs per sample.
  • Keywords
    computer vision; content-addressable storage; field programmable gate arrays; learning (artificial intelligence); pattern classification; support vector machines; FPGA accelerated complementary reduced dimensionality multi-prototype learning; associative memory based architectures; automotive domains; complementary classifiers; discriminative reduced dimensionality multiprototype classifiers; general purpose classifiers; general purpose support vector machine based systems; hardware constraints; hardware-accelerated reduced dimensionality multiprototype learning; high-speed computer vision applications; machine learning applications; machine learning systems; real-time performance; recognition system; robotics; Accuracy; Computer architecture; Euclidean distance; Feature extraction; Hardware; Prototypes; Support vector machines;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Cybernetics and Intelligent Systems (CIS), IEEE Conference on
  • Conference_Location
    Manila
  • ISSN
    2326-8123
  • Print_ISBN
    978-1-4799-1072-4
  • Type

    conf

  • DOI
    10.1109/ICCIS.2013.6751569
  • Filename
    6751569