DocumentCode
3430142
Title
Line Coding for Clock Recovery With Minimal Filtering
Author
Song, Zuojian ; Takasaki, Yoshitaka
Author_Institution
Toyo Univ., Kawagoe
fYear
2007
fDate
22-24 Aug. 2007
Firstpage
430
Lastpage
433
Abstract
Line codes for clock recovery with minimal filtering are investigated. First, it is explained that a 4T processing is preferable to conventional 4T/2T processing for a 1B4B/3B4B code from the standpoint of jitter reduction. Then 2B/4B codes are proposed where 3T and IT processings are applicable. It is shown that these new codes can not only simplify hardware but also lead to improved jitter characteristic as compared with existing schemes.
Keywords
block codes; jitter; synchronisation; clock recovery; jitter reduction; line coding; minimal filtering; multipled block codes; Circuits; Clocks; Delay; Electronic mail; Frequency; Hardware; Information filtering; Information filters; Jitter; Repeaters;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Computers and Signal Processing, 2007. PacRim 2007. IEEE Pacific Rim Conference on
Conference_Location
Victoria, BC
Print_ISBN
978-1-4244-1189-4
Electronic_ISBN
1-4244-1190-4
Type
conf
DOI
10.1109/PACRIM.2007.4313266
Filename
4313266
Link To Document