DocumentCode
3430605
Title
Efficient antialiasing decimation filter for ΔΣ converters
Author
Presti, Letizia Lo ; Akhdar, Adnan
Author_Institution
Dept. of Electron., Politecnico di Torino, Italy
Volume
1
fYear
1998
fDate
1998
Firstpage
367
Abstract
In this paper a method to design and implement a very efficient antialiasing multistage decimation filter for ΔΣ converters is discussed. The design of a rotated sine (RS) filter is optimised in such a way as to minimize the aliasing noise due to the decimation process, and to reduce the complexity of the filter structure. The obtained scheme has no multiplier at the higher rate and exhibits high performances in terms of noise reduction. The proposed structure can be used for high order modulators. Simulation tests, shown in the paper, validate the method
Keywords
VLSI; antialiasing; integrated circuit noise; sigma-delta modulation; ΔΣ converters; antialiasing decimation filter; decimation process; filter structure complexity; high order modulators; noise reduction; rotated sine filter; Attenuation; Baseband; Birth disorders; Electronic mail; Filtering; Frequency response; Noise reduction; Noise shaping; Power harmonic filters; Quantization;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 1998 IEEE International Conference on
Conference_Location
Lisboa
Print_ISBN
0-7803-5008-1
Type
conf
DOI
10.1109/ICECS.1998.813342
Filename
813342
Link To Document