Application specific VLSI architectures based on De Bruijn graphs

Author

Pradhan, Dhiraj K.

Author_Institution

Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA

fYear

1990

fDate

5-7 Sep 1990

Firstpage

628

Lastpage

640

Abstract

The author provides an overview of various key features of De Bruijn graph-based VLSI architectures. The advantages of De Bruijn architectures over such other architectures as cube and shuffle-exchange are discussed. Important differences between De Bruijn interconnects and others are also described. The evolution of the De Bruijn interconnect is described. The FFT architecture and the Viterbi decoder for convolutional codes are examined in detail. The issues of routing and fault tolerance are addressed

Keywords

VLSI; application specific integrated circuits; decoding; distributed processing; fast Fourier transforms; microprocessor chips; parallel architectures; ASIC; De Bruijn architectures; De Bruijn graphs; De Bruijn interconnects; FFT architecture; VLSI; Viterbi decoder; convolutional codes; fault tolerance; routing; Application software; Communication networks; Computer architecture; Computer networks; Concurrent computing; Distributed computing; Fault tolerance; Proposals; Robustness; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Application Specific Array Processors, 1990. Proceedings of the International Conference on

Conference_Location

Princeton, NJ

Print_ISBN

0-8186-9089-5

Type

conf

DOI

10.1109/ASAP.1990.145498

Filename

145498