Title :
Systolic array implementation of 2-D finite memory filters
Author :
Foda, S.G. ; Elmasry, M.I. ; Agathoklis, P.
Author_Institution :
Dept. of Electr. Eng., Ryerson Polytech. Inst., Toronto, Ont., Canada
Abstract :
A scheme of systolic array implementation for recursive two-dimensional finite memory filters in real time is presented. A 2D state space model for recursive finite memory filters is used to derive a pipelined array for real-time implementation. The technique is based on block processing via iteration. The parallel implementation is a broadcast, calculate, and aggregate (BCA) paradigm with a regular communication structure. The processing elements (PEs) are simple and easy to design and verify, which makes the design cost effective
Keywords :
real-time systems; systolic arrays; two-dimensional digital filters; 2D state space model; block processing; cost effective; digital filters; pipelined array; processing elements; real time; recursive two-dimensional finite memory filters; regular communication structure; systolic array implementation; Costs; Digital filters; Equations; Noise measurement; Polynomials; Signal sampling; Stability; State-space methods; Systolic arrays; Time measurement;
Conference_Titel :
Communications, Computers and Signal Processing, 1991., IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC
Print_ISBN :
0-87942-638-1
DOI :
10.1109/PACRIM.1991.160836
