DocumentCode
3431160
Title
A high-radix hardware algorithm for calculating the exponential M E modulo N
Author
Orup, Holger ; Kornerup, Peter
Author_Institution
Dept. of Comput. Sci., Aarhus Univ., Denmark
fYear
1991
fDate
26-28 Jun 1991
Firstpage
51
Lastpage
56
Abstract
In a class of cryptosystems, fast computation of modulo exponentials is essential. The authors present a parallel version of a well-known exponentiation algorithm that halves the worst-case computing time. It is described how a high radix modulo multiplication can be implemented by interleaving a serial-parallel multiplication scheme with an SRT division scheme. The problems associated with high radices are efficiently solved by the use of a redundant representation of intermediate operands. It is shown how the algorithms can be realized as a highly regular VLSI circuit. Simulations indicate that a radix 32 implementation of the algorithms is capable of computing 512-b operand exponentials in 3.2 ms. This is more than five times faster than other known implementations
Keywords
VLSI; cryptography; digital arithmetic; multiplying circuits; parallel algorithms; SRT division; VLSI circuit; cryptosystems; exponentiation algorithm; high radix modulo multiplication; high-radix hardware algorithm; intermediate operands; modulo exponentials; parallel algorithm; radix 32 implementation; redundant representation; serial-parallel multiplication; worst-case computing time; Circuit simulation; Communication system security; Computational modeling; Computer science; Cryptography; Hardware; Neck; Protocols; Transmitters; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 1991. Proceedings., 10th IEEE Symposium on
Conference_Location
Grenoble
Print_ISBN
0-8186-9151-4
Type
conf
DOI
10.1109/ARITH.1991.145533
Filename
145533
Link To Document