An arbiter synthesis approach based on arbitration scheme generation/selection for HW/SW co-design

The aim of this paper is to present an arbiter synthesis approach stated as an arbitration scheme generation/selection problem. This approach may be easily inserted in an extendible system co- design methodology, It assumes that many co-design tasks have been performed, and it aims to automate the resolution of the access conflict problems that may be inevitably encountered whenever there is a resource contention in the system. The proposed approach allows one to transform a system composed of high level processes that share the same channels and the same variables in disordered manner into a set of processes executed by interconnected processors and hardware devices (e.g., ASICs, FPGAs, etc.) that share the same resource such as memories and busses using the most efficient arbitration scheme, This approach is basically based on an algorithm that allows respectively the automatic generation/selection of the arbitration scheme, and the fixed priority assignment in a manner that minimizes the real time cost