DocumentCode :
3431222
Title :
Content addressable memory for flash redundancy
Author :
Jex, Jerry ; Baker, Alan
Author_Institution :
Intel Corp., Folsom, CA, USA
fYear :
1991
fDate :
9-10 May 1991
Firstpage :
741
Abstract :
The authors describe content addressable memory (CAM) used on a 1-Mb flash memory. Yield is improved by replacing defective columns containing fatal random defects. The CAM provides the address of a redundant column as an output needed to implement column redundancy. Novel placement of the CAM can decrease redundant CAM area, decreases the total chip area, and increases the redundancy efficiency
Keywords :
content-addressable storage; chip area; content addressable memory; fatal random defects; flash redundancy; redundancy efficiency; redundant column; Associative memory; CADCAM; Cities and towns; Computer aided manufacturing; Costs; Fabrication; Flash memory; Information geometry; Integrated circuit yield; Process design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Computers and Signal Processing, 1991., IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC
Print_ISBN :
0-87942-638-1
Type :
conf
DOI :
10.1109/PACRIM.1991.160846
Filename :
160846
Link To Document :
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