DocumentCode
3431287
Title
Small moduli replications in the MRRNS
Author
Wigley, N. ; Jullien, G.A. ; Reaume, D. ; Miller, W.C.
Author_Institution
Windsor Univ., Ont., Canada
fYear
1991
fDate
26-28 Jun 1991
Firstpage
92
Lastpage
99
Abstract
The authors describe mapping, scaling, and conversion processes using a new mapping strategy for the modulus replication residue number system (MRRNS). The strategy allows direct mapping of bits of either a purely real or multiplexed bit coded complex number to a set of independent rings, defined by moduli 3, 5, and 7. The MRRNS technique is superior to a large QRNS system operating with a computational dynamic range of over 27 b. A classical radix-4 implementation of a 1024 FFT is used for the comparison. The scaling and conversion procedure is shown to be a set of finite ring calculations followed by an array of ordinary binary adders. The VLSI implementation of the most complex finite ring circuit required (a Mod 7 multiplier) is shown to be easily implemented using the switching tree approach, and mask extracted simulations at 50 MHz demonstrate the embedding of the switching trees in a dynamic pipeline/evaluate circuit with restoring latch
Keywords
VLSI; digital arithmetic; multiplying circuits; number theory; FFT; MRRNS; Mod 7 multiplier; VLSI; binary adders; bits; classical radix-4; conversion; finite ring calculations; finite ring circuit; independent rings; mapping; mask extracted simulations; modulus replication residue number system; multiplexed bit coded complex number; real bit coded complex number; restoring latch; scaling; switching tree; Algorithm design and analysis; Arithmetic; Cathode ray tubes; Dynamic range; Embedded computing; Pipelines; Polynomials; Signal design; Signal processing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 1991. Proceedings., 10th IEEE Symposium on
Conference_Location
Grenoble
Print_ISBN
0-8186-9151-4
Type
conf
DOI
10.1109/ARITH.1991.145539
Filename
145539
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