DocumentCode :
3431392
Title :
New area efficient residue-to-weighted number system converters
Author :
Mathew, Jimson ; Radhakrishnan, D. ; Srikanthan, T.
Author_Institution :
Div. of Comput. Syst., Nanyang Technol. Inst., Singapore
Volume :
2
fYear :
1999
fDate :
5-8 Sep 1999
Firstpage :
945
Abstract :
The residue number system is popular in high performance arithmetic applications like digital signal processing because of its carry free nature, modularity and error correcting properties. But these opportunities are eclipsed by the high area and time requirements for reverse conversion. In this regard, we present two new techniques for residue-to-weighted number system conversion. The first one is based on the popular Chinese remainder theorem. Here by evaluating the quotient the number is decoded. The second one deals with residue-to-mixed radix conversions. The arithmetic based technique replaces the conventional hardware intensive look up tables by simple adders. An OHR based high speed MRC is also presented. The mixed radix converters described are memoryless and are hardware efficient compared to conventional techniques
Keywords :
adders; error correction; residue number systems; Chinese remainder theorem; adders; digital signal processing; error correcting properties; high performance arithmetic applications; modularity; one-hot RNS; residue-to-mixed radix conversions; residue-to-weighted number system converters; Binary trees; Cathode ray tubes; Concurrent computing; Digital arithmetic; Digital signal processing; Embedded computing; Embedded system; Error correction; Hardware; High performance computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
Conference_Location :
Pafos
Print_ISBN :
0-7803-5682-9
Type :
conf
DOI :
10.1109/ICECS.1999.813388
Filename :
813388
Link To Document :
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