Tutorial T8B: Performance Debugging of Complex Embedded Systems

Modern embedded systems are often associated with stringent performance, cost and power constraints. Hence, designing such systems involve guaranteeing that these constraints are met, apart from the usual functional validation. Such systems typically consist of a heterogeneous collection of processors, specialized memory subsystems, and partially programmable or fixed-function components. This heterogeneity, coupled with issues such as hardware/software partitioning, mapping, scheduling, etc., leads to a large number of design possibilities, thereby making performance debugging of such systems a difficult problem. This tutorial will provide a comprehensive overview of the recent developments on this front, with focus on timing analysis. In particular we will cover the following issues: (i.) does a design meet its timing requirements, (ii.) if not, then which parts of the system are responsible for the timing violation; and (iii.) once they are identified, then how should the design be suitably modified? The topics covered will span over the major abstraction levels involved in embedded systems design, starting from software analysis and micro-architectural modeling, to modeling of resource sharing and communication at the system level. Apart from discussing the relevant modeling and analysis techniques, the tutorial will also cover practical case studies and tool demos. In particular, we plan to demo two tools: one covering software timing analysis, and the other focusing on system level performance analysis. We will conclude the tutorial with future directions in this research area with focus on integrated performance analysis/debugging at software and system level