Title :
A redundant binary Euclidean GCD algorithm
Author :
Parikh, Shrikant N. ; Matula, David W.
Author_Institution :
IBM, Westlake, TX, USA
Abstract :
An efficient implementation of the Euclidean GCD (greatest common divisor) algorithm employing the redundant binary number system is described. The time complexity is O(n), utilizing O(n)4-2 signed 1-b adders to determine the GCD of two n-b integers. The process is similar to that used in SRT division. The efficiency of the algorithm is competitive, to within a small factor, with floating point division in terms of the number of shift and add/subtract operations. The novelty of the algorithm is based on properties derived from the proposed scheme of normalization of signed bit fractions. The implementation is well suited for systolic hardware design
Keywords :
computational complexity; digital arithmetic; Euclidean GCD; floating point division; greatest common divisor; redundant binary number system; signed bit fractions; systolic hardware design; time complexity; Hardware; Monitoring; Sections; Table lookup;
Conference_Titel :
Computer Arithmetic, 1991. Proceedings., 10th IEEE Symposium on
Conference_Location :
Grenoble
Print_ISBN :
0-8186-9151-4
DOI :
10.1109/ARITH.1991.145563