DocumentCode :
3431706
Title :
Systems, Nano-technology and SiP
Author :
de Vries, R.P.
Author_Institution :
NXP Semicond.
fYear :
2007
fDate :
6-10 Jan. 2007
Firstpage :
33
Lastpage :
33
Abstract :
The on-going trend towards nanoscale technologies creates enormous opportunities for integration of complex functions and features. Many challenges have to be overcome in order to exploit nanoscale technologies for mass production: particularly relevant are CMOS SoC challenges such as low power, design for manufacturability and analog design. However, in order to provide a usable electronic function, any SoC needs to be packaged or assembled in a system in package, with its own set of challenges and requirements. The authors illustrate how NXP Semiconductors is overcoming the above
Keywords :
CMOS integrated circuits; nanotechnology; system-in-package; system-on-chip; CMOS SoC; SiP; electronic function; nanoscale technologies; nanotechnology; system in package; Assembly systems; CMOS logic circuits; CMOS technology; Electronics packaging; Engineering profession; Mass production; Physics; Semiconductor device manufacture; Semiconductor device packaging; Technological innovation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2007. Held jointly with 6th International Conference on Embedded Systems., 20th International Conference on
Conference_Location :
Bangalore
ISSN :
1063-9667
Print_ISBN :
0-7695-2762-0
Type :
conf
DOI :
10.1109/VLSID.2007.152
Filename :
4092019
Link To Document :
بازگشت