DocumentCode
3432611
Title
Some analyses on signature analysis with distortionless data compression
Author
Aoyama, Kenji ; Iwadare, Yoshihiro
Author_Institution
Dept. of Inf. Eng., Nagoya Univ., Japan
fYear
1992
fDate
16-20 Nov 1992
Firstpage
1088
Abstract
This paper shows that from the point of view of aliasing errors and the expected values of the wasting test cost caused by misjudging faulty circuits to be fault-free, there are instances where signature analysis with no (circuit output) compression(SA-NC) is preferable to signature analysis with single MISR(SA-MISR) or multiple input shift registers. It is proposed to apply distortionless sequence compression to the circuit output of SA-NC, which preserves the property of all error detection and yet results in come memory element reduction. Huffman coding and modified Ziv-Lempel coding are promising candidates of distortionless compression when the probabilities of occurrence of input sequences are known and unknown respectively. Simulations are made on two examples of circuits under test, a 9-input and 4-output priority encoder, and a 14-input and 8-output arithmetic logic unit. It is shown that in some instances, Huffman and modified Ziv-Lempel coding result in some 50% reduction of the circuit output length
Keywords
Huffman codes; data compression; error detection codes; integrated circuit testing; large scale integration; logic testing; Huffman coding; aliasing errors; arithmetic logic unit; circuit output length; distortionless sequence compression; memory element reduction; modified Ziv-Lempel coding; priority encoder; signature analysis; wasting test cost; Arithmetic; Circuit analysis; Circuit faults; Circuit simulation; Circuit testing; Costs; Data analysis; Huffman coding; Logic testing; Shift registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Singapore ICCS/ISITA '92. 'Communications on the Move'
Print_ISBN
0-7803-0803-4
Type
conf
DOI
10.1109/ICCS.1992.255094
Filename
255094
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