DocumentCode :
3432847
Title :
Test structures and test methodology for developing high voltage ESD protection
Author :
Concannon, Ann ; Vashchenko, Vladislav ; Ter Beek, Marcel ; Hopper, Peter
Author_Institution :
Nat. Semicond. Corp., Santa Clara, CA, USA
fYear :
2003
fDate :
17-20 March 2003
Firstpage :
167
Lastpage :
172
Abstract :
In this work, test structures and a test methodology is developed to evaluate proposed silicon controlled rectifier based ESD clamps in all modes of operation. TCAD analysis is used to identify possible ESD clamp structures. Standard ESD testing on the stand-alone test structures is used to screen the ESD capability of the candidate clamps. The transmission line pulse technique, with variation in pulse rise time, is used to evaluate the dynamic triggering characteristics of a snapback based clamp and select an appropriate clamp for fast switching applications. Finally, a very efficient local ESD clamp based on a bipolar-silicon controlled rectifier in a 24 V complementary power BiCMOS smart power process is presented.
Keywords :
BiCMOS integrated circuits; electrostatic discharge; integrated circuit design; integrated circuit reliability; integrated circuit testing; power integrated circuits; protection; semiconductor device models; technology CAD (electronics); thyristors; transmission lines; 24 V; ESD capability; ESD clamp structures; ESD testing; Si; TCAD analysis; bipolar-silicon controlled rectifier; complementary power BiCMOS smart power process; dynamic triggering characteristics; fast switching applications; high voltage ESD protection development; local ESD clamp; pulse rise time; silicon controlled rectifier based ESD clamps; snapback based clamp; stand-alone test structures; test methodology; test structures; transmission line pulse technique; BiCMOS integrated circuits; Biological system modeling; Clamps; Costs; Electrostatic discharge; Libraries; Protection; Semiconductor device testing; Thyristors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 2003. International Conference on
Print_ISBN :
0-7803-7653-6
Type :
conf
DOI :
10.1109/ICMTS.2003.1197456
Filename :
1197456
Link To Document :
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