Title :
A 3-dimensional FEM Based Resistance Extraction
Author :
Rajagopalan, Subramanian ; Batterywala, Shabbir
Author_Institution :
Adv. Technol. Group, Synopsys India Pvt. Ltd., Bangalore
Abstract :
Accurate extraction of parasitics is an important pre-cursor to timing and signal integrity analysis. In deep sub-micron technologies, the interconnect cross-section areas of metal at various points in a layer are no longer the same -the metal can be etched differently with varying width and spacings and/or the top-surface of the interconnect layer may be non-planar due to chemical mechanical polishing (CMP). Moreover, the cross-sections are also becoming increasingly trapezoidal in nature. In such a scenario, computing resistances using counting squares technique and other two-dimensional methods may no longer be accurate. At the same time, using highly accurate techniques such as a fine-grained finite element method (FEM) may not be feasible due to the large computation time. In this work, a three-dimensional FEM based resistance extractor that is fast and accurate has been implemented and compared with two other extractors, a counting squares based extractor and a meshing based extractor. The key behind this is an efficient domain discretization which is a conformal decomposition of the original geometry
Keywords :
chemical mechanical polishing; finite element analysis; integrated circuit interconnections; timing; 3D finite element method; chemical mechanical polishing; conformal decomposition; counting squares; deep submicron technologies; interconnect layer; resistance extraction; signal integrity analysis; timing analysis; Chemical technology; Data mining; Etching; Geometry; Integrated circuit interconnections; Parasitic capacitance; Runtime; Signal analysis; Timing; Wires;
Conference_Titel :
VLSI Design, 2007. Held jointly with 6th International Conference on Embedded Systems., 20th International Conference on
Conference_Location :
Bangalore
Print_ISBN :
0-7695-2762-0
DOI :
10.1109/VLSID.2007.8