DocumentCode
3433329
Title
Hardware implementation and power analysis of HWT for medical imaging
Author
Sazish, Abdul Naser ; Sharif, Mhd Saeed ; Amira, Abbes
Author_Institution
Dept. of Electron. & Comput. Eng., Brunel Univ., Uxbridge, UK
fYear
2009
fDate
13-16 Dec. 2009
Firstpage
775
Lastpage
778
Abstract
Processing large images requires a large amount of memory, power hungry and computationally intensive which causes a high demand for an efficient algorithm implementation to overcome the problems. This paper discusses an efficient hardware implementation of the Haar wavelet transform (HWT) core on reconfigurable platforms. The proposed HWT implementation can be explored for automatic detection and segmentation of tumour in medical images. The HWT algorithm has been demonstrated for the segmentation of phantom data and its hardware implementation has been carried out using Handel C on different field programmable gate arrays (FPGAs) devices. Results obtained for the implementation performance in terms of area and power have been evaluated and compared with other existing systems for HWT computation.
Keywords
C language; Haar transforms; field programmable gate arrays; hardware description languages; image segmentation; medical image processing; tumours; HWT algorithm; HWT hardware implementation; HWT power analysis; Haar wavelet transform; Handel C language; field programmable gate arrays; medical imaging; phantom data segmentation; reconfigurable platform; tumour identification; tumour segmentation; Acceleration; Biomedical imaging; Discrete wavelet transforms; Field programmable gate arrays; Frequency; Hardware; Image analysis; Image segmentation; Medical diagnostic imaging; Positron emission tomography;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
Conference_Location
Yasmine Hammamet
Print_ISBN
978-1-4244-5090-9
Electronic_ISBN
978-1-4244-5091-6
Type
conf
DOI
10.1109/ICECS.2009.5410770
Filename
5410770
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