Analysis and control of BJT latch in fully depleted floating-body submicron SOI MOSFETs

Author

Choi, J.Y. ; Fossum, J.G.

Author_Institution

Dept. of Electr. Eng., Florida Univ., Gainesville, FL, USA

fYear

1990

fDate

2-4 Oct 1990

Firstpage

21

Lastpage

22

Abstract

The floating-body bipolar junction transistor (BJT) effects in fully depleted 0.5-μm n-channel SOI (silicon on insulator) MOSFETs are analyzed, based on two-dimensional device simulations and on device measurements. PISCES simulations of the BJT-induced breakdown and latch phenomena are done, and parametric dependences are examined to give physical insight for optimal design. The analysis further relates the DC-breakdown and latch mechanisms in the fully depleted SOI MOSFET to the actual BJT-induced problems in an operating SOI CMOS circuit. A comprehensive understanding of floating-body effects is attained

Keywords

CMOS integrated circuits; impact ionisation; insulated gate field effect transistors; semiconductor device models; semiconductor-insulator boundaries; 0.5 micron; PISCES simulations; SOI CMOS circuit; Si-SiO₂; breakdown; floating-body bipolar junction transistor; floating-body effects; fully depleted floating-body; latch phenomena; optimal design; parametric dependences; submicron SOI MOSFET; two-dimensional device simulations; Circuit simulation; Electric breakdown; Electric resistance; Immune system; Impact ionization; Latches; Leakage current; MOSFET circuits; Physics; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

SOS/SOI Technology Conference, 1990., 1990 IEEE

Conference_Location

Key West, FL

Print_ISBN

0-87942-573-3

Type

conf

DOI

10.1109/SOSSOI.1990.145689

Filename

145689