Hardware Trojan detection methodology for FPGA

Nowadays, hardware Trojan protection became a hot topic especially after the horizontal silicon industry business model. Third party IPs are the building blocks of many critical systems and that arises the question of confidentiality and reliability of these blocks. In this work, we present novel methods for system protection and Trojan detection that alleviate the need for a golden chip. In addition, we introduce a scenario to dynamically remove infected IPs embedded on FPGAs. We propose multiplexing reconfigurable IPs´ outputs and a CRC Trojan detection schema to detect Hardware Trojan. Dynamic Trojan detection is done using multiple variant voting. We show the practicality of the introduced schemes by providing a proof of concept implementation of the different methodologies on FPGAs. We investigate methods´ overhead to provide superior security properties that can be used in critical and strategically important systems.