Title :
Negative conductance model for short-channel SOI MOSFET
Author :
Lai, J.C. ; Fabian, T. ; Liu, S.T.
Author_Institution :
Honeywell Solid State Electron. Center, Plymouth, MN, USA
Abstract :
A short-channel SOI (silicon on insulator) n-channel MOSFET when source/drain junctions bottom out to the buried oxide may display a negative conductance in the output characteristics when the body tie is connected to the source. This phenomenon has been recently attributed to a temperature effect. However, the temperature effect is too small to account for the observation. Based on the theory of charge particle interaction in an electric field (between the channel electron flow and hole flow generated by impact ionization), a physical model is derived to account for the observation of the negative conductance. The model is implemented in a modified SPICE program to facilitate the verification. The model fits to a short-channel SOI n-channel MOSFET made on a thin low-defect SIMOX material at VGS=5.0 V
Keywords :
impact ionisation; insulated gate field effect transistors; negative resistance; semiconductor device models; semiconductor-insulator boundaries; Si-SiO2; charge particle interaction; impact ionization; low-defect SIMOX material; modified SPICE program; n-channel; negative conductance; physical model; short-channel SOI MOSFET; temperature effect; Charge carrier processes; Displays; Electron traps; Immune system; Impact ionization; MOSFET circuits; Road transportation; SPICE; Solid state circuits; Temperature;
Conference_Titel :
SOS/SOI Technology Conference, 1990., 1990 IEEE
Conference_Location :
Key West, FL
Print_ISBN :
0-87942-573-3
DOI :
10.1109/SOSSOI.1990.145691
