Influence of LDD on aging of SOI NMOS transistors

Aging characteristics of 1.3-μm silicon-on-insulator (SOI) CMOS transistors were studied for two different low doped drain (LDD) configurations. Fundamental differences concerning hot carrier effects were observed, and the impact on reliability was clarified. It appears that overall transistor performances are very sensitive to LDD optimization: low N-doping is recommended for low ionization rate, subsequent good blocking voltage, and intrinsic VG_bl increase during aging; high N-, in spite of small low time shifts, must be used carefully if initial blocking characteristics and bipolar effects are critical. In such cases, bulk transistor recommendations (high N- must be used in order to maintain high electric field under the transistor gate) may not be suitable for SOI transistors