Title :
Power efficient multimodulus programmable frequency divider with half-integer division ratio step size
Author :
Wang, Shengyang ; Zhu, JiaFeng ; Qu, Zhihua ; Wu, Jianhui
Author_Institution :
Nat. ASIC Res. Center, Southeast Univ., Nanjing, China
Abstract :
A novel half-integer multimodulus programmable divider was presented in this paper. It is based on the combination of the zipper divider structure and the reversed phase-switching technique (RPST). To solve the unwanted division ratio (DR) decreasing problem which is inevitably introduced by RPST, we can set DR one more than the expected value with smart design of the feedback control block. Also, we adopt a power saving method to reduce the divider´s power consumption about 21% on average. The proposed divider can be used in fractional-N frequency synthesizers to suppress the quantization noise with the folded DR step size.
Keywords :
circuit feedback; frequency dividers; frequency synthesizers; programmable circuits; delta-sigma fractional-N frequency synthesizer; feedback control block; half-integer division ratio step size; multimodulus programmable frequency divider; power saving method; reversed phase-switching technique; smart design; zipper divider structure; 1f noise; Application specific integrated circuits; Delta modulation; Digital modulation; Energy consumption; Feedback control; Frequency conversion; Frequency modulation; Frequency synthesizers; Quantization;
Conference_Titel :
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
Conference_Location :
Yasmine Hammamet
Print_ISBN :
978-1-4244-5090-9
Electronic_ISBN :
978-1-4244-5091-6
DOI :
10.1109/ICECS.2009.5410797