Title :
Noise overshoot at drain current kink in SOI MOSFET
Author :
Chen, Jian ; Fang, Peng ; Ko, Ping Keun ; Hu, Chenming ; Solomon, Ray ; Chan, Tung-Yi ; Sodini, Charles G.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
The bias dependence of the drain current noise power of SOI (silicon-on-insulator) MOSFETs was studied, and low frequency noise overshoot at the drain current was observed. The overshoot has a width of about 0.7 V and exhibits a peak noise power which is two orders of magnitude higher than the normal noise level. The SOI devices used in this study were N-channel polysilicon gate MOSFETs on SIMOX (separation by implantation of oxygen) wafers fabricated with conventional submicron CMOS technology. The SOI film thickness, the buried-oxide thickness, and the gate oxide are 100 nm, 300 nm, and 11.5 nm, respectively. A computer-controlled test system was used to conduct the I-V and noise measurement automatically. A model explaining the occurrence of the noise overshoot and the noise peak is proposed
Keywords :
electron device noise; hot carriers; impact ionisation; insulated gate field effect transistors; random noise; semiconductor device testing; semiconductor-insulator boundaries; N-channel polysilicon gate; SIMOX; SOI MOSFET; Si-SiO2; bias dependence; computer-controlled test system; drain current kink; hot carriers; impact ionisation; low frequency noise overshoot; model; submicron CMOS technology; trap related phenomena; Automatic testing; CMOS technology; Low-frequency noise; MOSFET circuits; Noise level; Noise measurement; Power MOSFET; Semiconductor device modeling; Silicon on insulator technology; System testing;
Conference_Titel :
SOS/SOI Technology Conference, 1990., 1990 IEEE
Conference_Location :
Key West, FL
Print_ISBN :
0-87942-573-3
DOI :
10.1109/SOSSOI.1990.145699