• DocumentCode
    3433999
  • Title

    Fast turn characterization of SIMOX wafers

  • Author

    Liu, S.T. ; Fechner, P.S. ; Roisen, R.L.

  • Author_Institution
    Honeywell Solid State Electron. Center, Plymouth, MN, USA
  • fYear
    1990
  • fDate
    2-4 Oct 1990
  • Firstpage
    61
  • Lastpage
    62
  • Abstract
    Physical and electrical properties of incoming low-defect SIMOX SOI wafers were characterized by fast turn techniques to determine their suitability for device applications. Physical properties were evaluated extensively with optical reflectometry and cross-sectional transmission electron microscopy. To facilitate evaluation of the back channel property with minimal processing. Schottky barrier MOS and simple regular MOS test structures were made. Schottky barrier behavior was noted in the characteristics near the origin and the conduction at zero gate bias. Back channel properties were evaluated first, and then the device was subjected to irradiation using a 10-keV ARACOR/4100 X-ray source with doses in the Mrad (SiO2) region. The threshold voltage shift and the subthreshold voltage swing were measured. The radiation induced interface states in the Mrad (SiO2) region were determined
  • Keywords
    Schottky effect; X-ray effects; dislocation density; elemental semiconductors; insulated gate field effect transistors; integrated circuit technology; interface electron states; ion implantation; semiconductor-insulator boundaries; silicon; spectrochemical analysis; transmission electron microscope examination of materials; MOS test structures; SIMOX wafers; Schottky barrier MOS; Schottky barrier behavior; Si-SiO2; back channel properties; back channel property; conduction at zero gate bias; cross-sectional transmission electron microscopy; electrical properties; fast turn techniques; optical reflectometry; physical properties; radiation induced interface states; subthreshold voltage swing; threshold voltage shift; Electron optics; Etching; MOSFETs; Optical microscopy; Reflectometry; Schottky barriers; Silicon; Solid state circuits; Testing; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOS/SOI Technology Conference, 1990., 1990 IEEE
  • Conference_Location
    Key West, FL
  • Print_ISBN
    0-87942-573-3
  • Type

    conf

  • DOI
    10.1109/SOSSOI.1990.145710
  • Filename
    145710