Challenges of aluminum RIE technology at sub 0.45 μm pitches [DRAM interconnects]

Author

Ravikumar, R. ; Filippi, R.G. ; Iggulden, R.C. ; Kiewra, E.W. ; Kirihata, T. ; Kitahara, H. ; Lee, G.Y. ; Liegl, B. ; Matsunaga, T. ; Ning, X.J. ; Rath, D.L. ; Stojakovic, G. ; Weber, S.J.

Author_Institution

DRAM Dev. Alliance, Infineon Technol. Corp., Hopewell Junction, NY, USA

fYear

1999

fDate

1999

Firstpage

203

Lastpage

205

Abstract

Aluminum based wiring is common in the back-end-of-line (BEOL) metallization of DRAM chips. The 256 Mb DRAM chips necessitate the fabrication of wires at minimum pitch, especially when a stitched architecture is used. The critical topics related to extending aluminum interconnects by reactive ion etch (RIE) technology are discussed in this paper

Keywords

DRAM chips; aluminium; integrated circuit interconnections; integrated circuit layout; integrated circuit metallisation; integrated circuit reliability; integrated circuit testing; sputter etching; 0.45 micron; 256 Mbit; Al; BEOL metallization; DRAM chips; DRAM interconnects; aluminum RIE technology; aluminum based wiring; aluminum interconnects; back-end-of-line metallization; reactive ion etch; stitched architecture; wire fabrication pitch; Aluminum; Costs; Etching; Fabrication; Metallization; Microelectronics; Random access memory; Resists; Stability; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology, 1999. IEEE International Conference

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-5174-6

Type

conf

DOI

10.1109/IITC.1999.787122

Filename

787122