Title :
Low-cost Bayer to RGB bilinear interpolation with hardware-aware median filter
Author :
Pérez, Jesus M. ; Sánchez, Pablo ; Martínez, Marcos
Author_Institution :
TEISA, Univ. of Cantabria, Santander, Spain
Abstract :
This High-definition and real-time video is one of the features that is being explored for the next generation of telecommunication systems. Most commercial video-cameras obtain Bayer images that have to be converted to RGB ones. Even though most of these cameras are able to perform this conversion internally, when working with high-definition images this process is quite slow and impedes real-time applications. Therefore, it is interesting to explore high-speed solutions that can perform Bayer to RGB conversion outside the camera. This paper presents a color interpolation design based on bilinear interpolation and a new real-time median filter with low memory requirements. The system is designed for real-time high-definition video systems although it can be used for single frame interpolation. The median filter proposed increases the performance by about 4 dBs with respect to a simple bilinear interpolation system. This improvement in the performance is obtained without adding extra delay or memory to the classical bilinear interpolation. It only increases lightly the area. The memory consumption is reduced to two frame lines and it is implemented in less than 30% of the area available in a Spartan III S500 FPGA, working at almost 100 MHz. The system can work with high resolution frames up to 1280Ã1024 pixels.
Keywords :
field programmable gate arrays; image colour analysis; interpolation; median filters; Bayer images; FPGA; RGB bilinear interpolation; color imaging; color interpolation design; colour-filter-array pattern; frequency 100 MHz; hardware-aware median filter; high-definition images; high-definition video systems; red-green-blue components; telecommunication systems; video-cameras; Cameras; Costs; Field programmable gate arrays; Filters; Hardware; High definition video; Image converters; Interpolation; PSNR; Real time systems;
Conference_Titel :
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
Conference_Location :
Yasmine Hammamet
Print_ISBN :
978-1-4244-5090-9
Electronic_ISBN :
978-1-4244-5091-6
DOI :
10.1109/ICECS.2009.5410826