DocumentCode
3434406
Title
An approach for reducing the programming cost of soft switches in reconfigurable WSI arrays
Author
Liu, T. ; Lombardi, F.
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fYear
1993
fDate
1993
Firstpage
233
Lastpage
242
Abstract
Discusses the cost involved in the programming of nonpermanent (soft) switching elements in an augmented interconnection network for reconfigurable two-dimensional wafer scale integration (WSI) arrays. The formulation and characterization of two different figures for evaluating the cost of switch programming are given. A new cost, referred to as the adjusted cost, is introduced for establishing a relationship between the programming process and the switching modes of the target array. Reduction in cost is achieved by two techniques: redundancy reduction given by the number of times a switch is programmed in a tree; and a relaxation technique, referred to as compression, in which each of the two cost figures is primarily considered for reduction.
Keywords
VLSI; multiprocessor interconnection networks; parallel architectures; redundancy; adjusted cost; augmented interconnection network; compression; reconfigurable WSI arrays; redundancy reduction; relaxation technique; soft switches; switch programming; switching modes; Computer science; Costs; Dynamic programming; Intelligent networks; Multiprocessor interconnection networks; Network topology; Redundancy; Routing; Switches; Switching circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Wafer Scale Integration, 1993. Proceedings., Fifth Annual IEEE International Conference on
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-0867-0
Type
conf
DOI
10.1109/ICWSI.1993.255255
Filename
255255
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