DocumentCode
3434429
Title
Limitations to fully-depleted SOI structures
Author
Lawrence, R.K. ; Campisi, G.J. ; Shontz, G.J. ; Pollack, G. ; Sundaresan, R.
Author_Institution
ARACOR/SFA, Washington, DC, USA
fYear
1990
fDate
2-4 Oct 1990
Firstpage
101
Lastpage
102
Abstract
The authors demonstrate the mobility and threshold voltage behavior for fully depleted transistors of various geometries on various epitaxial silicon thicknesses. Electrical characterization techniques were used to examine fully depleted SIMOX SOI front- and back-gate transistors of gate geometries between 0.6 and 3 μm on epitaxial silicon of thicknesses between 150 and 300 nm. Degradation in N-channel mobilities and threshold voltages was observed for short channel lengths and decreasing epitaxial silicon thickness. The decrease in mobility was attributed to the higher electric fields for small geometries. SOI is better than bulk, and fully depleted SOI is better than non-fully depleted SOI. Ultra thin SOI, synonymous with fully depleted, uses narrow gates, and thus the problem of degradation in mobility will be observed. Fully depleted SOI mitigates but does not remove the field dependence of mobility
Keywords
carrier mobility; insulated gate field effect transistors; semiconductor-insulator boundaries; 0.6 to 3 micron; 150 to 300 nm; N-channel mobilities; SIMOX; Si-SiO2; back-gate transistors; epitaxial thickness; field dependence; front-gate transistors; fully depleted transistors; fully-depleted SOI structures; mobility degradation; short channel lengths; threshold voltage behavior; ultrathin SOI; Degradation; Dielectrics; Geometry; Instruments; Isolation technology; Laboratories; Microelectronics; Scattering; Silicon; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
SOS/SOI Technology Conference, 1990., 1990 IEEE
Conference_Location
Key West, FL
Print_ISBN
0-87942-573-3
Type
conf
DOI
10.1109/SOSSOI.1990.145729
Filename
145729
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