DocumentCode
3434462
Title
A framework for offline optimization of energy consumption in real time multiprocessor system-on-chip
Author
Bhatti, Muhammad Khurram ; Belleudy, Cecile ; Auguin, Michel
Author_Institution
LEAT, Univ. of Nice-Sophia Antipolis, Sophia Antipolis, France
fYear
2009
fDate
13-16 Dec. 2009
Firstpage
900
Lastpage
903
Abstract
Emerging trends in applications with the requirement of considerable computational capacity and decreasing time-to-market have urged the need of multiprocessor systems. With the advent of multiprocessor systems, there is an increased demand to efficiently control their energy and power budget. As the technology scales to increasingly smaller feature sizes, the static power consumption is expected to grow exponentially which will also contribute a significant part in system´s total power consumption. Moreover, modern-day applications are complex and offer limited extractable parallelism which eventually leads to poor performance by existing energy optimization techniques. In this paper, we present a two-fold framework for energy optimization. In the first step, we provide an algorithm, called MPSched (Minimum Processors for Schedulability), to optimize on the number of processors needed to fulfill execution requirement of target application. In the second step, we perform Static Voltage and Frequency Scaling (SVFS) to achieve an optimal energy profile of the system.
Keywords
computational complexity; multiprocessing systems; power aware computing; processor scheduling; real-time systems; system-on-chip; time to market; MPSched algorithm; SVFS; computational capacity; energy consumption; energy optimization technique; execution requirement; minimum processors for schedulability; offline optimization; real time multiprocessor system-on-chip; static power consumption; static voltage and frequency scaling; time-to-market; two-fold framework; Control systems; Energy consumption; Frequency; Multiprocessing systems; Parallel processing; Processor scheduling; Real time systems; Scheduling algorithm; Time to market; Voltage; Real time; SVFS; energy; idle intervals; multiprocessor system-on-chip; power consumption; scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
Conference_Location
Yasmine Hammamet
Print_ISBN
978-1-4244-5090-9
Electronic_ISBN
978-1-4244-5091-6
Type
conf
DOI
10.1109/ICECS.2009.5410831
Filename
5410831
Link To Document