• DocumentCode
    34345
  • Title

    A MOS Parametric Integrator With Improved Linearity for SC \\Sigma \\Delta Modulators

  • Author

    Hoda Seyedhosseinzadeh, B. ; Nabavi, A.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Tarbiat Modares Univ., Tehran, Iran
  • Volume
    62
  • Issue
    3
  • fYear
    2015
  • fDate
    Mar-15
  • Firstpage
    231
  • Lastpage
    235
  • Abstract
    This brief presents a double complimentary metal- oxide-semiconductor (MOS) parametric integrator (DCMPI) with improved linearity characteristics for wideband switched-capacitor sigma-delta (ΣΔ) modulators. Compared with the MOS parametric integrator [1], the proposed circuit achieves similar power, noise, and speed performance, while its linearity characteristics and transfer function are improved. The main nonideality improvements in the proposed DCMPI are presented through the mathematical formulas and verified through the postlayout simulations performed in the Spectre/Cadence electrical simulator using the BSIM3v3 complementary MOS (CMOS) model in the standard 0.18-μm CMOS process.
  • Keywords
    CMOS analogue integrated circuits; integrating circuits; sigma-delta modulation; switched capacitor networks; BSIM3v3 complementary MOS; CMOS model; DCMPI; MOS parametric integrator; SC sigma-delta modulators; Spectre/Cadence electrical simulator; double complimentary metal- oxide-semiconductor; size 0.18 mum; wideband switched-capacitor sigma-delta modulators; Capacitors; Linearity; Modulation; Noise; Semiconductor device modeling; Transfer functions; Transistors; Low distortion; MOS parametric integrator; MOS parametric integrator (MPI); low distortion; switched-capacitor (SC) circuits; switched-capacitor circuits;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2014.2368971
  • Filename
    6951403