Semiconductor equipment requirements for Ge and III-V CMOS

Summary form only given. Continued miniaturization of silicon CMOS technology, has resulted in an unprecedented increase in performance of modern-day microprocessors. However, the exponentially rising transistor count has also increased the overall power consumption, making performance per watt of energy consumption as the key figure-of-merit for today´s performance microprocessors. Aggressive supply voltage scaling while maintaining the transistor performance is a direct approach to reducing the power dissipation since it reduces the dynamic power quadratically and leakage power linearly. To that effect, narrow gap semiconductor-based (e.g. SiGe, Ge and InGaAs) materials could enable the next generation of logic transistors operating below 0.5 V supply voltages since these materials have excellent transport properties, thereby resulting in high-speed switching under low operating electric fields. However, change of transistor channel and/or source/drain materials will demand new equipment technologies for making different components of the transistor: Gate Stack, Source/Drain, Channel, and contact. In this talk, challenges and opportunities associated with the introduction of Ge and III-V materials will be discussed.