Performance measurements of synchronization mechanisms on 16PE NOC based multi-core with dedicated synchronization and data NOC

Author

Tian, G. ; Hammami, O.

Author_Institution

ENSTA ParisTech, Paris, France

fYear

2009

fDate

13-16 Dec. 2009

Firstpage

988

Lastpage

991

Abstract

Multi-Processors System on Chip (MPSOC) are emerging as solutions for high performance embedded systems. Although important work have been achieved in the design and implementation of such systems the issue of synchronization mechanisms have not yet been properly evaluated for these targets. We present in this work synchronization performance evaluation results on a 16PE NOC based MPSOC which we designed and implemented on a single FPGA chip. All reported results come from actual execution and show hybrid synchronization mechanisms best fit the MPSOC configurations.

Keywords

embedded systems; field programmable gate arrays; multiprocessing systems; network-on-chip; synchronisation; 16PE network-on-chip; FPGA chip; field progammable gate array; high performance embedded systems; multiprocessors system-on-chip; synchronization mechanism; Computer architecture; Embedded system; Field programmable gate arrays; Hardware; Measurement; Network-on-a-chip; Pluto; Software tools; System-on-a-chip; Tiles; LL-SC; MPSOC; NOC; Synchronization;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on

Conference_Location

Yasmine Hammamet

Print_ISBN

978-1-4244-5090-9

Electronic_ISBN

978-1-4244-5091-6

Type

conf

DOI

10.1109/ICECS.2009.5410840

Filename

5410840