Millimeter-wave passive components on silicon for wireless communication applications

The performance of on-chip passives and their application at mm-wave frequencies in two key silicon technologies are presented in this paper. Power and linear combiners designed in advanced 130 nm SiGe-BiCMOS and 65 nm CMOS-SOI are used as demonstrators. Multi-port transformer and shielded-CPW-on-SOI power combiners realize insertion loss as low as 0.5 dB and reflected port to port impedance uniformity within 2.5% at 60 GHz in simulation. Linear combiner voltage amplitude and phase imbalances (from simulation) are better than 4.9% and 0.5 ¿, respectively. Test and measurement strategies for the multi-port passives are also described.